Commit graph

6 commits

Author SHA1 Message Date
Michael Meeks
ad768d2337 Handle only 256 pixel runs, to drop another variable.
Change-Id: I5e28b4f86ae191b181a69b82511d3393b5fc8c20
Signed-off-by: Michael Meeks <michael.meeks@collabora.com>
2023-09-25 16:55:04 +01:00
Michael Meeks
0153ddb554 First cut at getting aligned loads and simpler loop structure.
Remove the special case for the first pixel, and instead have a
previous pixel run initialized to zero.

AVX2 has no effective shift for the while si256 so use permutation
to shift the last pixel of the previous run into the right place,
mask it and combine.

Saves a second un-aligned load of the same data, and branch.

Change-Id: I77c9cdead13d37aaf4d9f31d98cbd5c4a9c5ce24
Signed-off-by: Michael Meeks <michael.meeks@collabora.com>
2023-09-25 16:55:04 +01:00
Michael Meeks
743fa7d91f Use a LUT and SIMD packing logic to accelerate RLE pixel copy.
Change-Id: I6874f1b33acf6f0f3c72c86f9fbe232e1f5a560a
Signed-off-by: Michael Meeks <michael.meeks@collabora.com>
2023-09-25 16:55:04 +01:00
Caolán McNamara
42e98bb2e4 experimentally bootstrap something using avx2 to generate bitmap
just enough to get the same results as before

https://github.com/CollaboraOnline/online/issues/7165

Signed-off-by: Caolán McNamara <caolan.mcnamara@collabora.com>
Change-Id: I109c9b8f1e7935782c72e0179aa0ed48712eadb6
2023-09-25 16:55:04 +01:00
Michael Meeks
6d6425336d SIMD - first cut at building LUT for vpermd gather.
Change-Id: I6ae13be0a36b4e30b3d535029313d8402da7de1d
Signed-off-by: Michael Meeks <michael.meeks@collabora.com>
2023-09-25 16:55:04 +01:00
Michael Meeks
cce3767ba8 First cut SIMD wrappers / separation to accelerate RLE code.
Split it out as a C file, to avoid accidental C++ header inclusion,
and C is a cross-platform assembler anyway so a good match.

Change-Id: I6c042781713aecaf143b9663af8377659a7deaf1
Signed-off-by: Michael Meeks <michael.meeks@collabora.com>
2023-09-25 16:55:04 +01:00