fix $(MAKE) usage in a make define
$(FOO) is expanded already during the $call, $$(FOO) will become $(FOO). Change-Id: Ia5d6966c16c57e4ec688f2c7623315cc2c74c78d
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1 changed files with 3 additions and 3 deletions
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@ -64,13 +64,13 @@ define gb_Top_GbuildModuleRules
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.PHONY: $(1) $(1).all $(1).build $(1).check $(1).clean $(1).showdeliverables $(1).subsequentcheck
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$(1): bootstrap fetch
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cd $(SRCDIR)/$(2) && $(MAKE) $(PARALLELISM_OPTION) $(GMAKE_OPTIONS)
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cd $(SRCDIR)/$(2) && $$(MAKE) $(PARALLELISM_OPTION) $(GMAKE_OPTIONS)
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$(1).build $(1).check $(1).clean $(1).showdeliverables $(1).subsequentcheck:
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cd $(SRCDIR)/$(2) && $(MAKE) $(PARALLELISM_OPTION) $(GMAKE_OPTIONS) $$(patsubst $(1).%,%,$$@)
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cd $(SRCDIR)/$(2) && $$(MAKE) $(PARALLELISM_OPTION) $(GMAKE_OPTIONS) $$(patsubst $(1).%,%,$$@)
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$(1).all: bootstrap fetch
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$(MAKE) $(PARALLELISM_OPTION) $(GMAKE_OPTIONS) -f $(SRCDIR)/Makefile.gbuild $(WORKDIR)/Module/$(1) $(if $(CROSS_COMPILING),,$(WORKDIR)/Module/check/$(1) $(WORKDIR)/Module/slowcheck/$(1))
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$$(MAKE) $(PARALLELISM_OPTION) $(GMAKE_OPTIONS) -f $(SRCDIR)/Makefile.gbuild $(WORKDIR)/Module/$(1) $(if $(CROSS_COMPILING),,$(WORKDIR)/Module/check/$(1) $(WORKDIR)/Module/slowcheck/$(1))
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endef
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